The present invention relates to methods for fabricating nonvolatile memory devices.
Semiconductor memory devices are largely classified into volatile memory devices and nonvolatile memory devices. Volatile memory devices refer to memory devices that lose stored data when they are disconnected from their power sources. Examples of volatile memory devices include static random access memory (SRAM) devices, dynamic random access memory (DRAM) devices and synchronous dynamic random access memory (SDRAM) devices. In contrast, nonvolatile memory devices refer to memory devices that retain stored data even when the devices are disconnected from their power sources. Examples of nonvolatile memory devices include read only memory (ROM) devices, programmable read only memory (PROM) devices, electrically programmable read only memory (EPROM) devices, electrically erasable programmable read only memory (EEPROM) devices, flash memory devices, nonvolatile memory devices that use a resistive elements (for example, phase-change random access memory (PRAM) devices, ferroelectric random access memory (FRAM) devices or resistive random access memory (RRAM) devices) and so on.
In a flash memory device, a plurality of adjacent gate lines that extend in first direction may be formed on a substrate. As the integration level of flash memory devices is increased, the width of these gate lines and/or the distance between adjacent gate lines may be decreased. As the gate lines become thinner and closer together, the possibility that one or more gate lines may collapse or lean onto an adjacent gate line (which is referred to herein as a “gate leaning phenomenon”) during the manufacture of the flash memory may be increased.